;----------------------------------------------------------- ; ; Universal Oscillator : September 1998 ; ; Output = [TIOCB-0] (CN1,11pin) ; ;----------------------------------------------------------- ;##### Port Defines ##### smr .equ h'0fffb0 brr .equ h'0fffb1 scr .equ h'0fffb2 tdr .equ h'0fffb3 ssr .equ h'0fffb4 rdr .equ h'0fffb5 pbddr .equ h'0fffd4 pbdr .equ h'0fffd6 iprb .equ h'0ffff8 tstr .equ h'0fff60 tsnc .equ h'0fff61 tmdr .equ h'0fff62 tfcr .equ h'0fff63 toer .equ h'0fff90 tocr .equ h'0fff91 TCR0 .equ h'0fff64 TIOR0 .equ h'0fff65 TIER0 .equ h'0fff66 TSR0 .equ h'0fff67 TCNT0 .equ h'0fff68 GRA0 .equ h'0fff6A GRB0 .equ h'0fff6C TCR1 .equ h'0fff6E TIOR1 .equ h'0fff6F TIER1 .equ h'0fff70 TSR1 .equ h'0fff71 TCNT1 .equ h'0fff72 GRA1 .equ h'0fff74 GRB1 .equ h'0fff76 TCR2 .equ h'0fff78 TIOR2 .equ h'0fff79 TIER2 .equ h'0fff7A TSR2 .equ h'0fff7B TCNT2 .equ h'0fff7C GRA2 .equ h'0fff7E GRB2 .equ h'0fff80 TCR3 .equ h'0fff82 TIOR3 .equ h'0fff83 TIER3 .equ h'0fff84 TSR3 .equ h'0fff85 TCNT3 .equ h'0fff86 GRA3 .equ h'0fff88 GRB3 .equ h'0fff8A BRA3 .equ h'0fff8C BRB3 .equ h'0fff8E TCR4 .equ h'0fff92 TIOR4 .equ h'0fff93 TIER4 .equ h'0fff94 TSR4 .equ h'0fff95 TCNT4 .equ h'0fff96 GRA4 .equ h'0fff98 GRB4 .equ h'0fff9A BRA4 .equ h'0fff9C BRB4 .equ h'0fff9E ;##### Vector Defines ##### .section vector,data,locate=h'000000 .data.l start .org h'0000d0 .data.l int_rx_error .data.l int_rx_full ;##### Work RAM Data Defines ##### .section ram,data,locate=h'0fef10 timer1 .res.w 1 timer2 .res.w 1 timer3 .res.w 1 rx_top .res.w 1 rx_end .res.w 1 div_data .res.w 1 input_data .res.b 5 rsb .res.b 1 channel .res.b 1 dcb .res.b 1 keyno .res.b 1 data .res.b 1 counter .res.b 1 led .res.b 1 .org h'0ff400 rx_fifo .res.b 512 ;***** Constant Table Defines ***** .section rom,data,locate=h'001000 table_1: .data 0,1,2,3,4,5,6,7,8,9,0,0,0,0,0,0 table_2: .data 0,1,2,3,4,5,6,0,0,0,0,0,0,0,0,0 ;***** Reset --> Initialize --> Main Loop ***** .section program,code,locate=h'002000 start: mov.l #h'0fff0f,er7 ; stack pointer set mov.l #h'0fef10,er2 mov.w #h'0fe0,r1 mov.b #0,r0l _ram_clear: mov.b r0l,@er2 inc.l #1,er2 dec.w #1,r1 bne _ram_clear jsr @sci0_init ; SCI0 initialize mov.b #b'11111111,r0l mov.b r0l,@pbddr ; set : Port[B] all output jsr @wait_500msec mov.b #b'01110000,r0l ; tx/rx start ! mov.b r0l,@scr andc #b'01111111,ccr ; interrupt enable mov.b #b'01000011,r0l ; Initialize TCR0 mov.b r0l,@TCR0 ; clock= 2MHz mov.b #B'00110000,r0l ; Initialize TIOR0 mov.b r0l,@TIOR0 ; GRB toggle mov.w #h'07d0,r0 ; Initialize GRB0 mov.w r0,@div_data mov.w r0,@GRB0 ; 500Hz bset #0,@tstr ; Start ITU ch0 loop: jsr @timer_check jsr @rx_midi_check jmp @loop ;***** SCI init, MIDI Transmit Routines ***** sci0_init: mov.b #b'00000000,r0l mov.b r0l,@scr mov.b #b'00000000,r0l mov.b r0l,@smr mov.b #15,r0l mov.b r0l,@brr mov.w #500,r0 _sci0_wait: dec.w #1,r0 bne _sci0_wait mov.b @ssr,r0l ; (dummy read) mov.b #0,r0l mov.b r0l,@ssr rts ;***** Timer / Counter Routines ***** wait_500msec: mov.l #500,er1 _wait_1: jsr @wait_1msec sub.l #1,er1 bne _wait_1 rts wait_1msec: mov.l #2048,er2 _wait_2: sub.l #1,er2 bne _wait_2 rts timer_check: mov.w @timer1,r1 inc.w #1,r1 mov.w r1,@timer1 beq _timer_1 rts _timer_1: mov.w @timer2,r1 inc.w #1,r1 mov.w r1,@timer2 cmp.w #80,r1 bne _timer_2 mov.w #0,r1 mov.w r1,@timer2 _timer_2: mov.b @counter,r0l inc.b r0l mov.b r0l,@counter mov.b @led,r0l bnot #7,r0l mov.b r0l,@led mov.b r0l,@pbdr ; write to Port[B] rts ;***** Rx Interrupt, MIDI Receive Routines ***** int_rx_error: bclr #5,@ssr bclr #4,@ssr rte int_rx_full: push.w r0 push.l er5 btst #6,@ssr bclr #6,@ssr mov.w @rx_top,r5 mov.w #0,e5 mov.b @rdr,r0l mov.b r0l,@(rx_fifo,er5) inc.w #1,r5 bclr #1,r5h mov.w r5,@rx_top pop.l er5 pop.w r0 rte rx_midi_check: mov.w @rx_top,r1 mov.w @rx_end,r5 cmp.w r1,r5 bne _rx_exist rts _rx_exist: mov.w #0,e5 mov.b @(rx_fifo,er5),r0h ; received data = [r0h] inc.w #1,r5 bclr #1,r5h mov.w r5,@rx_end btst #7,r0h beq running mov.b r0h,r0l and.b #b'11111000,r0l cmp.b #b'11111000,r0l bne _lower_f8 rts _lower_f8: and.b #b'11110000,r0l cmp.b #b'11110000,r0l bne _lower_f0 mov.b #0,r0l mov.b r0l,@rsb rts _lower_f0: mov.b r0h,r0l and.b #b'00001111,r0l mov.b r0l,@channel mov.b r0h,r0l and.b #b'11110000,r0l mov.b r0l,@rsb mov.b #0,r0l mov.b r0l,@dcb rts running: mov.b @rsb,r0l bne _normal rts _normal: cmp.b #b'11000000,r0l beq _2byte cmp.b #b'11010000,r0l beq _2byte mov.b @dcb,r1l bne _3byte inc.b r1l mov.b r1l,@dcb mov.b r0h,@keyno rts _2byte: rts _3byte: mov.b #0,r1h mov.b r1h,@dcb mov.b r0h,@data mov.b @channel,r1l or.b r1l,r0l cmp.b #h'0ad,r0l ; MIDI 14ch ? beq _ok_go rts _ok_go: mov.b @data,r0l and.b #b'00001111,r0l extu.w r0 extu.l er0 mov.b @keyno,r2l cmp.b #0,r2l beq _keta_0 cmp.b #1,r2l beq _keta_1 cmp.b #2,r2l beq _keta_2 cmp.b #3,r2l beq _keta_3 cmp.b #4,r2l beq _keta_4 cmp.b #5,r2l beq _keta_5 _keta_0: jmp @div_setting _keta_1: mov.b @(table_2,er0),r3l mov.b r3l,@input_data+0 rts _keta_2: mov.b @(table_1,er0),r3l mov.b r3l,@input_data+1 rts _keta_3: mov.b @(table_1,er0),r3l mov.b r3l,@input_data+2 rts _keta_4: mov.b @(table_1,er0),r3l mov.b r3l,@input_data+3 rts _keta_5: mov.b @(table_1,er0),r3l mov.b r3l,@input_data+4 rts div_setting: mov.w #0,r4 mov.b @input_data+0,r1l extu.w r1 mov.w #10000,r3 mulxu.w r1,er3 add.w r3,r4 mov.b @input_data+1,r1l extu.w r1 mov.w #1000,r3 mulxu.w r1,er3 add.w r3,r4 mov.b @input_data+2,r1l extu.w r1 mov.w #100,r3 mulxu.w r1,er3 add.w r3,r4 mov.b @input_data+3,r1l extu.w r1 mov.w #10,r3 mulxu.w r1,er3 add.w r3,r4 mov.b @input_data+4,r3l extu.w r3 add.w r3,r4 mov.l #1000000,er2 divxu.w r4,er2 mov.w r2,@div_data mov.w r2,@GRB0 ; New Frequency ! rts .end