LIST 36 ============================================================================ ;##### RAM Map ##### dseg org 0000h tx_fifo ds 256 tx_top ds 1 tx_end ds 1 timer_flag ds 4 glove_status ds 1 x_value ds 2 y_value ds 2 counts ds 4 channel ds 1 ;##### I/O Map ##### cseg ctc_0 equ 0010h s_gen equ 0017h sio_a equ 0018h sio_b equ 001ah pio_a equ 001ch pio_b equ 001eh led_up equ 0080h led_down equ 0081h led_left equ 0082h led_right equ 0083h ;##### MACRO ##### io_set macro @1,@2 ld a,@2 out (@1+1),a endm io_put macro @1,@2 ld a,@2 out (@1+0),a endm ;##### RESET ##### org 0000h ld sp,0ffffh di jp main ;##### INT / NMI ##### org 0020h dw _timer_ _timer_: ex af,af' ld a,1 ld (timer_flag+0),a ex af,af' ei reti org 0066h retn ;##### Data Table ##### org 0100h display_table_1: db 10h,10h,10h,10h,10h,10h,10h,10h ; 1 - 8 db 18h,18h,18h,18h,18h,18h,18h,18h ; 9 - 16 db 08h,08h,08h,08h,0ch,0ch,0ch,0ch ; 17 - 24 db 0ch,0ch,0ch,0ch,04h,04h,04h,04h ; 25 - 32 db 06h,06h,06h,06h,06h,06h,06h,06h ; 33 - 40 db 02h,02h,02h,02h,03h,03h,03h,03h ; 41 - 48 db 03h,03h,03h,03h,01h,01h,01h,01h ; 49 - 56 db 01h,01h,01h,01h,01h,01h,01h,01h ; 57 - 64 db 01h,01h,01h,01h,01h,01h,01h,01h ; 65 - 72 db 00h,00h,00h,00h,00h,00h,00h,00h ; 73 - 80 db 00h,00h,00h,00h,00h,00h,00h,00h ; 81 - 88 db 00h,00h,00h,00h,00h,00h,00h,00h ; 89 - 96 db 00h,00h,00h,00h,00h,00h,00h,00h ; 97 - 104 db 00h,00h,00h,00h,00h,00h,00h,00h ; 105 - 112 db 00h,00h,00h,00h,00h,00h,00h,00h ; 113 - 120 db 00h,00h,00h,00h,00h,00h,00h,00h ; 121 - 128 org 0200h display_table_2: db 10h,10h,10h,10h,10h,10h,10h,10h ; 1 - 8 db 10h,10h,10h,10h,08h,08h,08h,08h ; 9 - 16 db 08h,08h,08h,08h,08h,08h,08h,08h ; 17 - 24 db 04h,04h,04h,04h,04h,04h,04h,04h ; 25 - 32 db 04h,04h,04h,04h,02h,02h,02h,02h ; 33 - 40 db 02h,02h,02h,02h,02h,02h,02h,02h ; 41 - 48 db 01h,01h,01h,01h,01h,01h,01h,01h ; 49 - 56 db 01h,01h,01h,01h,01h,01h,01h,01h ; 57 - 64 db 01h,01h,01h,01h,00h,00h,00h,00h ; 65 - 72 db 00h,00h,00h,00h,00h,00h,00h,00h ; 73 - 80 db 00h,00h,00h,00h,00h,00h,00h,00h ; 81 - 88 db 00h,00h,00h,00h,00h,00h,00h,00h ; 89 - 96 db 00h,00h,00h,00h,00h,00h,00h,00h ; 97 - 104 db 00h,00h,00h,00h,00h,00h,00h,00h ; 105 - 112 db 00h,00h,00h,00h,00h,00h,00h,00h ; 113 - 120 db 00h,00h,00h,00h,00h,00h,00h,00h ; 121 - 128 org 0300h display_table_3: db 00h,00h,00h,00h,00h,00h,00h,00h ; 1 - 8 db 00h,00h,00h,00h,00h,00h,00h,00h ; 9 - 16 db 00h,00h,00h,00h,00h,00h,00h,00h ; 17 - 24 db 00h,00h,00h,00h,00h,00h,00h,00h ; 25 - 32 db 00h,00h,00h,00h,00h,00h,00h,00h ; 33 - 40 db 00h,00h,00h,00h,00h,00h,00h,00h ; 41 - 48 db 00h,00h,00h,00h,00h,00h,00h,00h ; 49 - 56 db 01h,01h,01h,01h,01h,01h,01h,01h ; 57 - 64 db 01h,01h,01h,01h,01h,01h,01h,01h ; 65 - 72 db 01h,01h,01h,01h,03h,03h,03h,03h ; 73 - 80 db 03h,03h,03h,03h,02h,02h,02h,02h ; 81 - 88 db 06h,06h,06h,06h,06h,06h,06h,06h ; 89 - 96 db 04h,04h,04h,04h,0ch,0ch,0ch,0ch ; 97 - 104 db 0ch,0ch,0ch,0ch,08h,08h,08h,08h ; 105 - 112 db 18h,18h,18h,18h,18h,18h,18h,18h ; 113 - 120 db 10h,10h,10h,10h,10h,10h,10h,10h ; 121 - 128 org 0400h display_table_4: db 00h,00h,00h,00h,00h,00h,00h,00h ; 1 - 8 db 00h,00h,00h,00h,00h,00h,00h,00h ; 9 - 16 db 00h,00h,00h,00h,00h,00h,00h,00h ; 17 - 24 db 00h,00h,00h,00h,00h,00h,00h,00h ; 25 - 32 db 00h,00h,00h,00h,00h,00h,00h,00h ; 33 - 40 db 00h,00h,00h,00h,00h,00h,00h,00h ; 41 - 48 db 00h,00h,00h,00h,00h,00h,00h,00h ; 49 - 56 db 00h,00h,00h,00h,01h,01h,01h,01h ; 57 - 64 db 01h,01h,01h,01h,01h,01h,01h,01h ; 65 - 72 db 01h,01h,01h,01h,01h,01h,01h,01h ; 73 - 80 db 02h,02h,02h,02h,02h,02h,02h,02h ; 81 - 88 db 02h,02h,02h,02h,04h,04h,04h,04h ; 89 - 96 db 04h,04h,04h,04h,04h,04h,04h,04h ; 97 - 104 db 08h,08h,08h,08h,08h,08h,08h,08h ; 105 - 112 db 08h,08h,08h,08h,10h,10h,10h,10h ; 113 - 120 db 10h,10h,10h,10h,10h,10h,10h,10h ; 121 - 128 ;##### Main ##### main: ld hl,08000h ld a,090h _ram_clear_loop: ld (hl),0 inc hl cp h jr nc,_ram_clear_loop io_put led_up,0ffh io_put led_down,0ffh io_put led_right,0ffh io_put led_left,0ffh io_set pio_a,0cfh ; Mode 3 io_set pio_a,00001111b ; 0:Out / 1:In io_set pio_a,007h ; Interrupt Disable io_set pio_b,0cfh ; Mode 3 io_set pio_b,00000000b ; 0:Out / 1:In io_set pio_b,007h ; Interrupt Disable io_put pio_a,10000000b io_put pio_b,0ffh io_put s_gen,00000000b ; Clock Generator io_set sio_a,00011000b ; Channel Reset A io_set sio_a,00000100b ; Resister Point = 4 io_set sio_a,10000100b ; Mode io_set sio_a,00000001b ; Resister Point = 1 io_set sio_a,00000000b ; Interrupt Mode io_set sio_a,00000101b ; Resister Point = 5 io_set sio_a,01101000b ; Transmit Start io_put ctc_0,20h ; Int. Address io_put ctc_0,10100101b io_put ctc_0,80 ; about 5msec ld a,0eh ld (channel),a call centering im 2 ei loop: call glove_scan call display_timer call tx_data_check jr loop ;##### Subroutines ##### x_value_set: ld a,(x_value+1) ld b,a ld a,(x_value) cp b ret z ld (x_value+1),a ld a,(channel) or 0b0h ld b,a call tx_data_set ld b,10 call tx_data_set ld a,(x_value) ld b,a call tx_data_set call x_value_disp ret y_value_set: ld a,(y_value+1) ld b,a ld a,(y_value) cp b ret z ld (y_value+1),a ld a,(channel) or 0b0h ld b,a call tx_data_set ld b,7 call tx_data_set ld a,(y_value) ld b,a call tx_data_set call y_value_disp ret tx_data_check: ld a,(tx_end) ld b,a ld a,(tx_top) cp b ret z io_set sio_a,00000000b ; Resister Point = 0 in a,(sio_a+1) bit 2,a ret z ld hl,tx_fifo ld l,b ld a,(hl) out (sio_a),a ld a,b inc a ld (tx_end),a ret tx_data_set: ld hl,tx_fifo ld a,(tx_top) ld l,a inc a ld (tx_top),a ld (hl),b ret centering: ld a,040h ld (x_value),a ld (y_value),a call x_value_set call y_value_set ret ;##### Panel LED Display ##### display_timer: ld a,(timer_flag+1) cp 50 ; about 250msec ret c xor a ld (timer_flag+1),a ld a,(timer_flag+2) inc a ld (timer_flag+2),a call x_value_disp call y_value_disp xor a ld (counts+0),a ld (counts+1),a ld (counts+2),a ld (counts+3),a ret x_value_disp: ld a,(timer_flag+2) bit 0,a jr nz,_x_disp_off ld hl,display_table_3 ld de,display_table_1 jr _x_disp_mix _x_disp_off: ld hl,display_table_4 ld de,display_table_2 _x_disp_mix: ld a,(x_value) ld l,a ld a,(hl) xor 0ffh out (led_right),a ld h,d ld a,(hl) xor 0ffh out (led_left),a ret y_value_disp: ld a,(timer_flag+2) bit 0,a jr z,_y_disp_off ld hl,display_table_3 ld de,display_table_1 jr _y_disp_mix _y_disp_off: ld hl,display_table_4 ld de,display_table_2 _y_disp_mix: ld a,(y_value) ld l,a ld a,(hl) xor 0ffh out (led_up),a ld h,d ld a,(hl) xor 0ffh out (led_down),a ret ;##### Power Glove Event Check ##### ;------------------------------------------------------------------------* ; Bit : 7 6 5 4 3 2 1 0 | ; right left down up start select first(B) thumb(A) | ;------------------------------------------------------------------------* glove_check: ld a,(glove_status) and 00001100b jr z,_glove_cont call centering ret _glove_cont: ld a,(glove_status) bit 1,a jp z,_glove_2 ld c,3 ; Fast Skip ld a,(glove_status) bit 4,a ; Up ? jr z,_glove_1 ld a,(counts+0) add a,c ld (counts+0),a bit 3,a jr z,_glove_1 ld a,(y_value) cp 7fh jr z,_glove_1 inc a ld (y_value),a call y_value_set xor a ld (counts+0),a ld (counts+1),a _glove_1: ld a,(glove_status) bit 5,a ; Down ? jr z,_glove_2 ld a,(counts+1) add a,c ld (counts+1),a bit 3,a jr z,_glove_2 ld a,(y_value) cp 0 jr z,_glove_2 dec a ld (y_value),a call y_value_set xor a ld (counts+0),a ld (counts+1),a _glove_2: ld a,(glove_status) bit 0,a ret z ld c,2 ; Slow Skip ld a,(glove_status) bit 6,a ; Left ? jr z,_glove_3 ld a,(counts+2) add a,c ld (counts+2),a bit 3,a jr z,_glove_3 ld a,(x_value) cp 0 jr z,_glove_3 dec a ld (x_value),a call x_value_set xor a ld (counts+2),a ld (counts+3),a _glove_3: ld a,(glove_status) bit 7,a ; Right ? ret z ld a,(counts+3) add a,c ld (counts+3),a bit 3,a ret z ld a,(x_value) cp 7fh ret z inc a ld (x_value),a call x_value_set xor a ld (counts+2),a ld (counts+3),a ret ;##### Power Glove Status Scan ##### glove_scan: ld a,(timer_flag+0) cp 0 ret z xor a ld (timer_flag+0),a ld a,(timer_flag+1) inc a ld (timer_flag+1),a ld b,0 call p_s_pulse in a,(pio_a) bit 0,a jr z,1$ set 0,b 1$: call clock_shift in a,(pio_a) bit 0,a jr z,2$ set 1,b 2$: call clock_shift in a,(pio_a) bit 0,a jr z,3$ set 2,b 3$: call clock_shift in a,(pio_a) bit 0,a jr z,4$ set 3,b 4$: call clock_shift in a,(pio_a) bit 0,a jr z,5$ set 4,b 5$: call clock_shift in a,(pio_a) bit 0,a jr z,6$ set 5,b 6$: call clock_shift in a,(pio_a) bit 0,a jr z,7$ set 6,b 7$: call clock_shift in a,(pio_a) bit 0,a jr z,8$ set 7,b 8$: call clock_shift ld a,b out (pio_b),a xor 0ffh ld (glove_status),a ; New Status call glove_check ret p_s_pulse: io_put pio_a,11000000b nop nop io_put pio_a,10000000b ret clock_shift: io_put pio_a,00000000b nop nop io_put pio_a,10000000b ret end ============================================================================